noname.cpp

its a long time since i blogged or commented on a blog, actually even read a blog. but now i am blogging not because i have anything to blog about but coz i feel like blogging. you just happened to be at the recieving end. that is pretty much it.
today i realized that our 5th semester is coming to an end. only 3 days of classes left. and i havent bunked enough classes yet this semester.
vacation starts in a week......

jon wishes he got an ipod.the only good thing in this blog is the pic. now on, believe me when i say i have nothing to write about.

Logic synthesis is a process by which an abstract form of desired circuit behavior (typically register transfer level (RTL) or behavioral) is turned into a design implementation in terms of logic gates.

THere can't be a better introduction. ie, unless the same thing is said by our ls sir.